{"id":2372,"date":"2026-06-06T14:50:59","date_gmt":"2026-06-06T12:50:59","guid":{"rendered":"https:\/\/orion.polito.it\/iolts\/?page_id=2372"},"modified":"2026-06-06T15:06:39","modified_gmt":"2026-06-06T13:06:39","slug":"preliminary-technical-program","status":"publish","type":"page","link":"https:\/\/orion.polito.it\/iolts\/preliminary-technical-program\/","title":{"rendered":"Technical Program"},"content":{"rendered":"\n<p><em>All sessions are scheduled according to the <strong>local time<\/strong><\/em>. This is a preliminary version of the <strong>technical program<\/strong>.<\/p>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-1 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:100%\">\n<div class=\"wp-block-group\"><div class=\"wp-block-group__inner-container is-layout-constrained wp-block-group-is-layout-constrained\"><\/div><\/div>\n<\/div>\n<\/div>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity\"\/>\n\n\n\n<h2 class=\"wp-block-heading\">July 1, 2026<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Registration1\">08:00 &#8211; 08:45 Registration &amp; Welcome Desk<\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Opening\">08:45 &#8211; 09:00 Opening Session <\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Keynote1\">09:00 &#8211; 10:00 Keynote<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> TBD<\/p>\n\n\n\n<p><strong><a href=\"https:\/\/orion.polito.it\/iolts\/keynote\/\">Architecting for Resilience at Scale: From Research to Practice<\/a><\/strong><\/p>\n\n\n\n<p><i class=\"fas fa-user\"><\/i> Speaker: Sudhanva Gurumurthi (AMD)<\/p>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular1\">10:00 &#8211; 11:00 Regular Session 1 &#8211; Fault-Tolerant AI Computing<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> <meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\">TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Algorithm-based Fault Tolerance for RISC-V Vector Processors in Safety-critical AI Applications<\/strong> &#8211; Sergiu-Mohamed ABED, Ahmet Cagri BAOBAB, Connie O&#8217;SHEA (Cadence Design Systems), Matteo SONZA REORDA, Josie RODRIGUEZ CONDIA (Politecnico di Torino)<br><i class=\"fas fa-user\"><\/i> Presenter: TBD<\/li>\n\n\n\n<li><strong>Effective and Memory-Efficient Alternatives to ECC for Reliable Large-Scale DNNs <\/strong>&#8211; Mohammad Hasan AHMADILIVANI, Marten ROOTS (Tallinn University of Technology), Marco RESTIFO (Arm ltd.), Sven-Markus LOORITS (Tallinn University of Technology), Luca DI MAURO (ARM), Jaan RAIK (Tallinn University of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: TBD<\/li>\n\n\n\n<li><strong>RESIST: Structured Regularization from Weight Similarity to Weight Diversity for Improving Error Resilience of Neural Network<\/strong> &#8211; Maryam ESLAMI, Salim ULLAH, Akash KUMAR (Ruhr University Bochum)<br><i class=\"fas fa-user\"><\/i> Presenter: TBD<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">11:00-11:30 Coffee Break <i class=\"fas fa-mug-hot\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">11:30 &#8211; 12:30 Special Session 2 &#8211; <\/h3>\n\n\n\n<p><strong>Organizer &amp; Moderator:<\/strong> Stefano Di Carlo (Politecnico di Torino)<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>TBD<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">12:30 &#8211; 12:50 Meta <\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> Yervant Zorian (Synopsys)<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>TBD<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">12:50 &#8211; 14:00 Lunch Break <i class=\"fas fa-utensils\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Special1\">14:00 &#8211; 15:00 Regular Session 2 &#8211; <strong>Error Detection and Correction Techniques<\/strong><\/h3>\n\n\n\n<p><strong>Moderator: <\/strong>TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Progressive Error-Aware ECC Techniques for Enhancing Flash Memory Reliability<\/strong> &#8211; Shyue-Kung LU, Jie-Xin SHI (National Taiwan Univ. of Science and Technology), Shi-Yu HUANG (National Tsing-Hua University), Kohei MIYASE (Kyushu Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: TBD<\/li>\n\n\n\n<li><strong>Vectorized In-Place CRC: A Zero-Memory-Overhead Fault Detection Scheme for QNNs on RISC-V<\/strong> &#8211; Giacomo PERLO, Annachiara RUOSPO, ERNESTO SANCHEZ (Politecnico di Torino)<br><i class=\"fas fa-user\"><\/i> Presenter: TBD<\/li>\n\n\n\n<li><strong>RAS Enhancement of ECC-Protected Vector Register File for the RISC-V Architecture via RERI-Compliant Interface<\/strong> &#8211; Canino NICASIO (University of Pisa), Marcello BARBIROTTA (&#8220;La Sapienza&#8221; University of Rome), Giovanni MAZZINI (University of Pisa), Mauro OLIVIERI (&#8220;La Sapienza&#8221; University of Rome), Daniele ROSSI, Sergio SAPONARA (University of Pisa)<br><i class=\"fas fa-user\"><\/i> Presenter: TBD<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">15:00 &#8211; 16:00 Poster &amp; Coffee Break <i class=\"fas fa-mug-hot\"><\/i><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining<\/strong> &#8211; Muhammad HASSAN (Tallinn University of Technology), Maria MUSHTAQ (Telecom Paris), Jaan RAIK (Tallinn University of Technology), Tara GHASEMPOURI (Talinn University of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Early-Stage Reliability Assessment of Tensor-Based Deep Learning Accelerators<\/strong> &#8211; Robert LIMAS SIERRA (Politecnico di Torino), Alessandro VERONESI (IHP &#8211; Microelectronics), Josie RODRIGUEZ CONDIA (Politecnico di Torino), Leticia Maria BOLZANI P\u00f6HLS (IHP, Leibniz Institut f\u00fcr innovative Mikroelektronik), Matteo SONZA REORDA (Politecnico di Torino) <br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Efficiently Mitigating Model Extraction Attacks against Neural Networks on Edge Devices<\/strong> &#8211; Antonio PORSIA, Giuseppe MONTEASI, Annachiara RUOSPO, ERNESTO SANCHEZ (Politecnico di Torino), Domenico GALDIERO (Dropper Srl)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>ELP: Elastic Lifetime Processors for Improving Server Energy Efficiency<\/strong> &#8211; Freddy GABBAY (The Hebrew University), Jawad HAJ-YAHYA (Rivos), Firas RAMADAN, Majd GANAIEM (Technion &#8211; Israel Institute of Technology), Panagiota NIKOLAOU (UCLan Cyprus), Yiannakis SAZEIDES (University of Cyprus)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Error-Resilient State-Space Networks Using Low-Precision Recovery Models<\/strong> &#8211; Jackson ISENBERG, Abhijit CHATTERJEE (Georgia Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Evaluating Generative AI for Functional Safety Analysis of Integrated Circuits<\/strong> &#8211; Mouadh AYACHE (Synopsys GmbH, Munich), Alessandra NARDI (Self), Aditya RAJ SINGH, Brian DAVENPORT, Ganapathy PARTHASARATHY, Teo CUPAIUOLO (Synopsys), Mladen BEREKOVIC (University of Luebeck), Saleh MULHEM (Institute of Computer Engineering, Universit\u00e4t zu L\u00fcbeck)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Evaluation of FPGA Delay Injection Mechanisms for Small Delay Fault Analysis<\/strong> &#8211; Tijmen T. SMIT, David POSTEMA, Pieter Panama, Marco OTTAVI (University of Twente)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Exploring microarchitectural information from SoC communication buses to detect firmware corruption<\/strong> &#8211; Lucas GEORGET (EDF R&amp;D \/ LAAS-CNRS), Vincent MIGLIORE, Vincent NICOMETTE, Philippe LELEUX (LAAS-CNRS), Arthur VILLARD, Fr\u00e9d\u00e9ric SILVI (EDF R&amp;D)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Hardware-Aware Runtime Detection of Soft-Error Anomalies in DPU-Accelerated Neural Networks<\/strong> &#8211; Federico BUCCELLATO, Corrado DE SIO, Sarah AZIMI, Luca STERPONE (Politecnico di Torino)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Special2\">16:00 &#8211; 17:00 Regular Session 3 &#8211; Physical experiments and measures<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> <meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\"><\/meta>TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Impact of Locations of Circuit Components on Multiple Cell Upset Mitigation in a 22 nm Bulk Process<\/strong> &#8211; Shuhei MANDAI, Ryuichi NAKAJIMA, Arata MATSUMOTO, Yusaku NAKAOKA, Hikaru NAKAMOTO, Sotaro TANIGUCHI (Kyoto Institute of Technology), Shinobu ONODA (National Institutes for Quantum Science and Technology), Jun FURUTA (Okayama Prefectural University), Kazutoshi KOBAYASHI (Kyoto Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>FD-SOI rather than Bulk &#8211; Experimental investigation of laser induced fault mechanisms in FD-SOI<\/strong> &#8211; Lo\u00efc MANGIN, Laurent MAINGAULT, Adri\u00e0 CALVO BELLOCQ, Romain WACQUEZ (CEA), Krishna PRADEEP, Philippe FLATRESSE, Rainer LUTZ (SOITEC)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Server Life Extensions at Scale<\/strong> &#8211; Rhea DUTTA (Meta Platforms Inc.), Harish DIXIT (Meta), Santosh KUMAR, Daniel MOORE, Sriram SANKAR (Meta Platforms Inc.)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Special2\">17:00 &#8211; 18:00 Regular Session 4 &#8211; <strong>Reliability Assessment<\/strong><\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> <meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\"><\/meta>TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Statistical Analysis of Architectural Vulnerability Factor for Soft Errors<\/strong> &#8211; Alessandra NARDI (Self), David KINGSTON (Synopsys), Ghani KANAWATI (ARM Ltd), Gourav GOYAL, Mouadh AYACHE, Dave JOHNSON, Jean-Marc FOREY (Synopsys)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Scalable Reliability Assessment of Visual Transformers on Systolic Arrays via Fault Propagation Analysis<\/strong> &#8211; Natalia CHEREZOVA (Tallinn University of Technology), Artur JUTMAN (Testonica Lab), Maksim JENIHHIN (Tallinn University of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>CIM-FI: A HW-Aware Fault Injection Framework for Digital Compute-In-Memory DNN Accelerators<\/strong> &#8211; Panagiotis CHIDES, Alexis MARAS (National Technical University of Athens), Theofilos SPYROU, Anteneh GEBREGIORGIS, Said HAMDIOUI (Delft University of Technology), Dimitrios SOUDRIS, Sotirios XYDIS (National Technical University of Athens)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"WelcomeReception\">18:00 &#8211; 19:00 Welcome Reception <i class=\"fas fa-martini-glass-citrus\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity\"\/>\n\n\n\n<h2 class=\"wp-block-heading\">July 2, 2026<\/h2>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Registration2\">08:30 &#8211; 09:00 Registration &amp; Welcome Desk<\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular3\">09:00 &#8211; 10:00 Keynote<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> TBD<\/p>\n\n\n\n<p><strong><a href=\"https:\/\/orion.polito.it\/iolts\/keynote\/\">Ultra low-cost secure chips on flexible foil: challenges and opportunities<\/a><\/strong><\/p>\n\n\n\n<p><i class=\"fas fa-user\"><\/i> Speaker: Nele Mentens (KU Leuven)<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular4\">10:00 &#8211; 11:00 Special Session 2 &#8211; <\/h3>\n\n\n\n<p><strong>Organiser &amp; Moderator: <\/strong>TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>TBD<\/li>\n\n\n\n<li><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">11:00 &#8211; 11:30 Coffee Break <i class=\"fas fa-mug-hot\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular4\">11:30 &#8211; 12:30 Regular Session 5 &#8211; <strong>Fault-Tolerant Architectures<\/strong><\/h3>\n\n\n\n<p><strong>Moderator: <\/strong>TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Accelerated Dynamic Voltage Drop Prediction Using a Lightweight Machine Learning Model<\/strong> &#8211; Freddy GABBAY, Ido PARCHOMOVSKY, Itay YONATANOV, Mohammad OMRI (The Hebrew University)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Lightweight Fault Resilient Flexible Flash-ADCs<\/strong> &#8211; Florentia AFENTAKI (University of Patras), Paula Carolina LOZANO DUARTE (Karlsruhe Institute of Technology), Georgios ZERVAKIS (National Technological University of Athens), Mehdi TAHOORI (Karlsruhe Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Efficient Multiple Error Correction in Binary HDC Systems Using Majority-Encoded Hypervector Matrices<\/strong> -Mohamed MEJRI, Abhijit CHATTERJEE (Georgia Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular4\">12:30 &#8211; 12:50 Meta<\/h3>\n\n\n\n<p><strong>Moderator: <\/strong>Yervant Zorian (Synopsys)<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">12:50 &#8211; 14:00 <i class=\"fas fa-utensils\"><\/i> Lunch Break<\/h3>\n\n\n\n<h3 class=\"wp-block-heading\">14:00 &#8211; 15:20 Regular Session 6 &#8211; Hardware Security<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> <meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\">TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier<\/strong> &#8211; Daniel THIRION, Jean-Marc DAVEAU (STMicroelectronics), Valentin EGLOFF (Univ. Grenoble Alpes, Grenoble INP, LCIS), Vincent BEROULLE (Grenoble Alpes University), Philippe ROCHE (STMicroelectronics), David HELY (GRENOBLE INP UGA) <br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Structural Security Entropy: A Novel Prior for Robust GNN-Based Security Assessment of Netlists<\/strong> &#8211; Rupesh KARN (New York University Abu Dhabi), Johann KNECHTEL (NYUAD), Ozgur SINANOGLU (NYU-Abu Dhabi) <br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Microarchitectural Analysis of Speculative Execution Patterns in RISC-V using Machine Learning and ISA-Level Masking Wrappers<\/strong> &#8211; Muhammad AWAIS (Telecom-paris), Maria MUSHTAQ (Telecom Paris), Lirida NAVINER (Institut Telecom, Telecom ParisTech, CNRS LTCI), Florent BRUGUIER (Universite de Montpellier), Haj Yahya JAWAD (META)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>SVE-Based Acceleration of Homomorphic Encryption Arithmetic on ARM Neoverse Processors<\/strong> &#8211; Massimiliano DONATI, Guido FALAI, Samuele BARTORELLI, Daniele ROSSI, Sergio SAPONARA (University of Pisa)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Social\">16:00 &#8211; 23:00 Social Event <i class=\"fas fa-champagne-glasses\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<p><strong>Social Event<\/strong><\/p>\n\n\n\n<p><\/p>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity\"\/>\n\n\n\n<h2 class=\"wp-block-heading\">July 3, 2026<\/h2>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Registration3\">09:00 &#8211; 09:30 Registration &amp; Welcome Desk<\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular6\">09:30 &#8211; 10:50 Regular Session 7 &#8211; <strong>Compute-in-Memory and Emerging AI Hardware Reliability<\/strong><\/h3>\n\n\n\n<p><strong>Moderator: <\/strong><meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\">TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Trust, but Verify: Reliable Compute-in-Memory via Double-Reference Sensing and Selective Recompute<\/strong> &#8211; Ali NEZHADI (Karlsruhe Institute of Technology), Odysseas CHATZOPOULOS, Dimitris GIZOPOULOS (University of Athens), Mehdi TAHOORI (Karlsruhe Institute of Technology) <br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>LOFT: Latent-Fault Optimization Training for Yield Boost in Resistive Crossbar AI Accelerators<\/strong> &#8211; Shanmukha MANGADAHALLI SIDEARM, Mehdi TAHOORI (Karlsruhe Institute of Technology) <br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Variation-Aware Training and Post-Manufacture Tuning of ReRAM Crossbar-Based Hyperdimensional Computing Systems<\/strong> &#8211; Sai Pranav KOMARAGIRI, Anurup SAHA, Mohamed MEJRI, Abhijit CHATTERJEE (Georgia Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Robust Stochastic Test Methodology for MTJ-Based Neurons in Spiking Neural Networks<\/strong> &#8211; Jesus GAMEZ (Inaoep), Victor CHAMPAC (INAOE), Elena Ioana VATAJELU (TIMA Laboratory), Leticia Bolzani POEHLS (IHP &#8211; Leibniz Institute for High Performance Microelectronics)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<p><\/p>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">10:50 &#8211; 11:50 Posters &amp; Coffee Break <i class=\"fas fa-mug-hot\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Hybrid Hardening for Robust DNNs Under Adversarial Attacks<\/strong> &#8211; Manar GANI (Ecole centrale de lyon), Leonardo ALEXANDRINO DE MELO, ALBERTO BOSIO (Lyon Institute of Nanotechnology), Ovidiu STAN, Vlad MICLEA, Liviu MICLEA (Technical University of Cluj-Napoca), Rodrigo POSSAMAI BASTOS (TIMA Laboratory (CNRS) \/ Universit), David NOVO (LIRMM), Bastien DEVEAUTOUR (IETR)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>InjectV: Modeling Fault Injection Attacks in Full-System RISC-V Simulation<\/strong> &#8211; Niccol\u00f2 LENTINI (Politecnico di Torino), Giorgio FARDO (Commissariat \u00e0 l&#8217;\u00e9nergie atomique et aux \u00e9nergies alternatives (CEA)), Stefano DI CARLO, Alessandro SAVINO (Politecnico di Torino)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Interpretable GNNs for Fault Detection in Circuits<\/strong> &#8211; Rupesh KARN, Johann KNECHTEL, Ozgur SINANOGLU (New York University Abu Dhabi)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>PATCH-FFT: Unmasking Dormant Hardware Trojans with Patch-Based<\/strong> <strong>Frequency-Domain Transformers<\/strong> &#8211; Hasala SENEVIRATHNE, Amin REZAEI (California State University, Long Beach)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Reliability of Multilevel Cell Phase-Change Memories for AI Implementations<\/strong> &#8211; Giuseppe SETTEGRANI, Riccardo GATTONI, Sara CRETI, Matteo NALDI, Martin Eugenio OMANA, Cecilia METRA (University of Bologna), Ivano SHIVANANDA TROJA (STMicroelectronics)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>SHOUT-Trainer: Closed-loop Trainer for Silent Data Corruption Hunting and Observation Using Transformers<\/strong> &#8211; Seyedehmaryam GHASEMI, Shanmukha MANGADAHALLI SIDDARAMU, Mehdi TAHOORI (Karlsruhe Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Thermal Laser Stimulation of Bulk Built-In Current Sensors in Silicon Devices<\/strong> &#8211; Hugo PERRIN (\u00c9cole des Mines de Saint-\u00c9tienne), Jean-baptiste RIGAUD (ENSM-SE), Raphael VIERA (EMSE)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>VeriSide-II: Structure-Aware Power Modeling for Side-Channel Analysis at Register Transfer Level<\/strong> &#8211; Behnam FARNAGHINEJAD, Annachiara RUOSPO, Alessandro SAVINO, Stefano DI CARLO, ERNESTO SANCHEZ (Politecnico di Torino)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular7\">11:50 &#8211; 12:50 Special Session 3 &#8211; AI Accelerators Architectures Reliability: Measure, Mitigate, Co-Design<\/h3>\n\n\n\n<p><strong>Organizer &amp; Moderator:<\/strong> Dimitris GIZOPOULOS (University of Athens)<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Freddy GABBAY (Hebrew U of Jerusalem), <\/li>\n\n\n\n<li>Odysseas CHATZOPOULOS, Dimitris GIZOPOULOS, Maria TRAKOSA (University of Athens)<\/li>\n\n\n\n<li>Anton ROZEN (Nvidia)<\/li>\n<\/ul>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">12:50 &#8211; 14:00 Lunch Break <i class=\"fas fa-utensils\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular8\">14:00 &#8211; 15:20 Regular Session 8 &#8211; Power and Energy Optimization<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> <meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\">TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Functional Self-Test for Deep Neural Networks<\/strong> &#8211; Dina MOUSSA, Hefenbrock MICHAEL, Mehdi TAHOORI (Karlsruhe Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Runtime BIST for ReRAM-based CAM using Frequency-Domain Monitoring<\/strong> &#8211; Haneen G. HEZAYYIN, Mehdi TAHOORI (Karlsruhe Institute of Technology)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>From prompts to pressure: evaluating LLM-driven agents for GPU stress-code generation<\/strong> &#8211; Giuseppe ESPOSITO, Aurora GENSALE, Juan GUERRERO, Josie RODRIGUEZ CONDIA, Luca CAGLIERO, Matteo SONZA REORDA (Politecnico di Torino)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Optimizing Test Economics Trade-Offs in Homogeneous 3D SICs via Cost Modeling<\/strong> &#8211; Giusy IARIA, Paolo BERNARDI (Politecnico Di Torino), Claudia BERTANI, Giuseppe GAROZZO, Vincenzo TANCORRE (STMicroelectronics)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">15:20 &#8211; 15:50 Coffee Break <i class=\"fas fa-mug-hot\"><\/i><\/h3>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Regular8\">15:50 &#8211; 16:50 Regular Session 9 &#8211; PUFs and Trustworthy Hardware<\/h3>\n\n\n\n<p><strong>Moderator:<\/strong> <meta http-equiv=\"content-type\" content=\"text\/html; charset=utf-8\"><\/meta>TBD<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>GINx4TL: Fine-grained Hardware Trojan Localization and Extraction Using Feature Explainable Graph Isomorphism Network<\/strong> &#8211; Afjal SAROWER (University of Arizona), Rozhin YASAEI (The University of Arizona)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>TroPUF: Evaluating Hardware Trojan Insertion in Delay-Based Physical Unclonable Functions<\/strong> &#8211; Marissa MARCARELLI, Amin REZAEI (California State University, Long Beach)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n\n\n\n<li><strong>Stochastic Model for a CMOS Image Sensor-Based PUF<\/strong> &#8211; Pierrick ARPIN (CEA-L\u00e9ti), Florian PEBAY PEYROULA (CEA), Gilles SICARD, Yann PANEBOEUF, Antoine DUPRET (CEA-L\u00e9ti)<br><i class=\"fas fa-user\"><\/i> Presenter: <\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"Closing\">16:50 &#8211; 17:00 Closing Session<\/h3>\n\n\n\n<p><\/p>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>All sessions are scheduled according to the local time. This is a preliminary version of the technical program. July 1,&hellip;<\/p>\n","protected":false},"author":4,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-2372","page","type-page","status-publish","hentry"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v23.4 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Technical Program - The 32nd IEEE International Symposium on On-Line Testing and Robust System Design<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/orion.polito.it\/iolts\/preliminary-technical-program\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Technical Program - The 32nd IEEE International Symposium on On-Line Testing and Robust System Design\" \/>\n<meta property=\"og:description\" content=\"All sessions are scheduled according to the local time. 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