All sessions are scheduled according to the local time. This is a preliminary version of the technical program.
July 1, 2026
08:00 – 08:45 Registration & Welcome Desk
08:45 – 09:00 Opening Session
09:00 – 10:00 Keynote
Moderator: TBD
Architecting for Resilience at Scale: From Research to Practice
Speaker: Sudhanva Gurumurthi (AMD)
10:00 – 11:00 Regular Session 1 – Fault-Tolerant AI Computing
Moderator: TBD
- Algorithm-based Fault Tolerance for RISC-V Vector Processors in Safety-critical AI Applications – Sergiu-Mohamed ABED, Ahmet Cagri BAOBAB, Connie O’SHEA (Cadence Design Systems), Matteo SONZA REORDA, Josie RODRIGUEZ CONDIA (Politecnico di Torino)
Presenter: TBD - Effective and Memory-Efficient Alternatives to ECC for Reliable Large-Scale DNNs – Mohammad Hasan AHMADILIVANI, Marten ROOTS (Tallinn University of Technology), Marco RESTIFO (Arm ltd.), Sven-Markus LOORITS (Tallinn University of Technology), Luca DI MAURO (ARM), Jaan RAIK (Tallinn University of Technology)
Presenter: TBD - RESIST: Structured Regularization from Weight Similarity to Weight Diversity for Improving Error Resilience of Neural Network – Maryam ESLAMI, Salim ULLAH, Akash KUMAR (Ruhr University Bochum)
Presenter: TBD
11:00-11:30 Coffee Break
11:30 – 12:30 Special Session 2 –
Organizer & Moderator: Stefano Di Carlo (Politecnico di Torino)
- TBD
12:30 – 12:50 Meta
Moderator: Yervant Zorian (Synopsys)
- TBD
12:50 – 14:00 Lunch Break
14:00 – 15:00 Regular Session 2 – Error Detection and Correction Techniques
Moderator: TBD
- Progressive Error-Aware ECC Techniques for Enhancing Flash Memory Reliability – Shyue-Kung LU, Jie-Xin SHI (National Taiwan Univ. of Science and Technology), Shi-Yu HUANG (National Tsing-Hua University), Kohei MIYASE (Kyushu Institute of Technology)
Presenter: TBD - Vectorized In-Place CRC: A Zero-Memory-Overhead Fault Detection Scheme for QNNs on RISC-V – Giacomo PERLO, Annachiara RUOSPO, ERNESTO SANCHEZ (Politecnico di Torino)
Presenter: TBD - RAS Enhancement of ECC-Protected Vector Register File for the RISC-V Architecture via RERI-Compliant Interface – Canino NICASIO (University of Pisa), Marcello BARBIROTTA (“La Sapienza” University of Rome), Giovanni MAZZINI (University of Pisa), Mauro OLIVIERI (“La Sapienza” University of Rome), Daniele ROSSI, Sergio SAPONARA (University of Pisa)
Presenter: TBD
15:00 – 16:00 Poster & Coffee Break
- DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining – Muhammad HASSAN (Tallinn University of Technology), Maria MUSHTAQ (Telecom Paris), Jaan RAIK (Tallinn University of Technology), Tara GHASEMPOURI (Talinn University of Technology)
Presenter: - Early-Stage Reliability Assessment of Tensor-Based Deep Learning Accelerators – Robert LIMAS SIERRA (Politecnico di Torino), Alessandro VERONESI (IHP – Microelectronics), Josie RODRIGUEZ CONDIA (Politecnico di Torino), Leticia Maria BOLZANI PöHLS (IHP, Leibniz Institut für innovative Mikroelektronik), Matteo SONZA REORDA (Politecnico di Torino)
Presenter: - Efficiently Mitigating Model Extraction Attacks against Neural Networks on Edge Devices – Antonio PORSIA, Giuseppe MONTEASI, Annachiara RUOSPO, ERNESTO SANCHEZ (Politecnico di Torino), Domenico GALDIERO (Dropper Srl)
Presenter: - ELP: Elastic Lifetime Processors for Improving Server Energy Efficiency – Freddy GABBAY (The Hebrew University), Jawad HAJ-YAHYA (Rivos), Firas RAMADAN, Majd GANAIEM (Technion – Israel Institute of Technology), Panagiota NIKOLAOU (UCLan Cyprus), Yiannakis SAZEIDES (University of Cyprus)
Presenter: - Error-Resilient State-Space Networks Using Low-Precision Recovery Models – Jackson ISENBERG, Abhijit CHATTERJEE (Georgia Institute of Technology)
Presenter: - Evaluating Generative AI for Functional Safety Analysis of Integrated Circuits – Mouadh AYACHE (Synopsys GmbH, Munich), Alessandra NARDI (Self), Aditya RAJ SINGH, Brian DAVENPORT, Ganapathy PARTHASARATHY, Teo CUPAIUOLO (Synopsys), Mladen BEREKOVIC (University of Luebeck), Saleh MULHEM (Institute of Computer Engineering, Universität zu Lübeck)
Presenter: - Evaluation of FPGA Delay Injection Mechanisms for Small Delay Fault Analysis – Tijmen T. SMIT, David POSTEMA, Pieter Panama, Marco OTTAVI (University of Twente)
Presenter: - Exploring microarchitectural information from SoC communication buses to detect firmware corruption – Lucas GEORGET (EDF R&D / LAAS-CNRS), Vincent MIGLIORE, Vincent NICOMETTE, Philippe LELEUX (LAAS-CNRS), Arthur VILLARD, Frédéric SILVI (EDF R&D)
Presenter: - Hardware-Aware Runtime Detection of Soft-Error Anomalies in DPU-Accelerated Neural Networks – Federico BUCCELLATO, Corrado DE SIO, Sarah AZIMI, Luca STERPONE (Politecnico di Torino)
Presenter:
16:00 – 17:00 Regular Session 3 – Physical experiments and measures
Moderator: TBD
- Impact of Locations of Circuit Components on Multiple Cell Upset Mitigation in a 22 nm Bulk Process – Shuhei MANDAI, Ryuichi NAKAJIMA, Arata MATSUMOTO, Yusaku NAKAOKA, Hikaru NAKAMOTO, Sotaro TANIGUCHI (Kyoto Institute of Technology), Shinobu ONODA (National Institutes for Quantum Science and Technology), Jun FURUTA (Okayama Prefectural University), Kazutoshi KOBAYASHI (Kyoto Institute of Technology)
Presenter: - FD-SOI rather than Bulk – Experimental investigation of laser induced fault mechanisms in FD-SOI – Loïc MANGIN, Laurent MAINGAULT, Adrià CALVO BELLOCQ, Romain WACQUEZ (CEA), Krishna PRADEEP, Philippe FLATRESSE, Rainer LUTZ (SOITEC)
Presenter: - Server Life Extensions at Scale – Rhea DUTTA (Meta Platforms Inc.), Harish DIXIT (Meta), Santosh KUMAR, Daniel MOORE, Sriram SANKAR (Meta Platforms Inc.)
Presenter:
17:00 – 18:00 Regular Session 4 – Reliability Assessment
Moderator: TBD
- Statistical Analysis of Architectural Vulnerability Factor for Soft Errors – Alessandra NARDI (Self), David KINGSTON (Synopsys), Ghani KANAWATI (ARM Ltd), Gourav GOYAL, Mouadh AYACHE, Dave JOHNSON, Jean-Marc FOREY (Synopsys)
Presenter: - Scalable Reliability Assessment of Visual Transformers on Systolic Arrays via Fault Propagation Analysis – Natalia CHEREZOVA (Tallinn University of Technology), Artur JUTMAN (Testonica Lab), Maksim JENIHHIN (Tallinn University of Technology)
Presenter: - CIM-FI: A HW-Aware Fault Injection Framework for Digital Compute-In-Memory DNN Accelerators – Panagiotis CHIDES, Alexis MARAS (National Technical University of Athens), Theofilos SPYROU, Anteneh GEBREGIORGIS, Said HAMDIOUI (Delft University of Technology), Dimitrios SOUDRIS, Sotirios XYDIS (National Technical University of Athens)
Presenter:
18:00 – 19:00 Welcome Reception
July 2, 2026
08:30 – 09:00 Registration & Welcome Desk
09:00 – 10:00 Keynote
Moderator: TBD
Ultra low-cost secure chips on flexible foil: challenges and opportunities
Speaker: Nele Mentens (KU Leuven)
10:00 – 11:00 Special Session 2 –
Organiser & Moderator: TBD
- TBD
11:00 – 11:30 Coffee Break
11:30 – 12:30 Regular Session 5 – Fault-Tolerant Architectures
Moderator: TBD
- Accelerated Dynamic Voltage Drop Prediction Using a Lightweight Machine Learning Model – Freddy GABBAY, Ido PARCHOMOVSKY, Itay YONATANOV, Mohammad OMRI (The Hebrew University)
Presenter: - Lightweight Fault Resilient Flexible Flash-ADCs – Florentia AFENTAKI (University of Patras), Paula Carolina LOZANO DUARTE (Karlsruhe Institute of Technology), Georgios ZERVAKIS (National Technological University of Athens), Mehdi TAHOORI (Karlsruhe Institute of Technology)
Presenter: - Efficient Multiple Error Correction in Binary HDC Systems Using Majority-Encoded Hypervector Matrices -Mohamed MEJRI, Abhijit CHATTERJEE (Georgia Institute of Technology)
Presenter:
12:30 – 12:50 Meta
Moderator: Yervant Zorian (Synopsys)
12:50 – 14:00 Lunch Break
14:00 – 15:20 Regular Session 6 – Hardware Security
Moderator: TBD
- Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier – Daniel THIRION, Jean-Marc DAVEAU (STMicroelectronics), Valentin EGLOFF (Univ. Grenoble Alpes, Grenoble INP, LCIS), Vincent BEROULLE (Grenoble Alpes University), Philippe ROCHE (STMicroelectronics), David HELY (GRENOBLE INP UGA)
Presenter: - Structural Security Entropy: A Novel Prior for Robust GNN-Based Security Assessment of Netlists – Rupesh KARN (New York University Abu Dhabi), Johann KNECHTEL (NYUAD), Ozgur SINANOGLU (NYU-Abu Dhabi)
Presenter: - Microarchitectural Analysis of Speculative Execution Patterns in RISC-V using Machine Learning and ISA-Level Masking Wrappers – Muhammad AWAIS (Telecom-paris), Maria MUSHTAQ (Telecom Paris), Lirida NAVINER (Institut Telecom, Telecom ParisTech, CNRS LTCI), Florent BRUGUIER (Universite de Montpellier), Haj Yahya JAWAD (META)
Presenter: - SVE-Based Acceleration of Homomorphic Encryption Arithmetic on ARM Neoverse Processors – Massimiliano DONATI, Guido FALAI, Samuele BARTORELLI, Daniele ROSSI, Sergio SAPONARA (University of Pisa)
Presenter:
16:00 – 23:00 Social Event
Social Event
July 3, 2026
09:00 – 09:30 Registration & Welcome Desk
09:30 – 10:50 Regular Session 7 – Compute-in-Memory and Emerging AI Hardware Reliability
Moderator: TBD
- Trust, but Verify: Reliable Compute-in-Memory via Double-Reference Sensing and Selective Recompute – Ali NEZHADI (Karlsruhe Institute of Technology), Odysseas CHATZOPOULOS, Dimitris GIZOPOULOS (University of Athens), Mehdi TAHOORI (Karlsruhe Institute of Technology)
Presenter: - LOFT: Latent-Fault Optimization Training for Yield Boost in Resistive Crossbar AI Accelerators – Shanmukha MANGADAHALLI SIDEARM, Mehdi TAHOORI (Karlsruhe Institute of Technology)
Presenter: - Variation-Aware Training and Post-Manufacture Tuning of ReRAM Crossbar-Based Hyperdimensional Computing Systems – Sai Pranav KOMARAGIRI, Anurup SAHA, Mohamed MEJRI, Abhijit CHATTERJEE (Georgia Institute of Technology)
Presenter: - Robust Stochastic Test Methodology for MTJ-Based Neurons in Spiking Neural Networks – Jesus GAMEZ (Inaoep), Victor CHAMPAC (INAOE), Elena Ioana VATAJELU (TIMA Laboratory), Leticia Bolzani POEHLS (IHP – Leibniz Institute for High Performance Microelectronics)
Presenter:
10:50 – 11:50 Posters & Coffee Break
- Hybrid Hardening for Robust DNNs Under Adversarial Attacks – Manar GANI (Ecole centrale de lyon), Leonardo ALEXANDRINO DE MELO, ALBERTO BOSIO (Lyon Institute of Nanotechnology), Ovidiu STAN, Vlad MICLEA, Liviu MICLEA (Technical University of Cluj-Napoca), Rodrigo POSSAMAI BASTOS (TIMA Laboratory (CNRS) / Universit), David NOVO (LIRMM), Bastien DEVEAUTOUR (IETR)
Presenter: - InjectV: Modeling Fault Injection Attacks in Full-System RISC-V Simulation – Niccolò LENTINI (Politecnico di Torino), Giorgio FARDO (Commissariat à l’énergie atomique et aux énergies alternatives (CEA)), Stefano DI CARLO, Alessandro SAVINO (Politecnico di Torino)
Presenter: - Interpretable GNNs for Fault Detection in Circuits – Rupesh KARN, Johann KNECHTEL, Ozgur SINANOGLU (New York University Abu Dhabi)
Presenter: - PATCH-FFT: Unmasking Dormant Hardware Trojans with Patch-Based Frequency-Domain Transformers – Hasala SENEVIRATHNE, Amin REZAEI (California State University, Long Beach)
Presenter: - Reliability of Multilevel Cell Phase-Change Memories for AI Implementations – Giuseppe SETTEGRANI, Riccardo GATTONI, Sara CRETI, Matteo NALDI, Martin Eugenio OMANA, Cecilia METRA (University of Bologna), Ivano SHIVANANDA TROJA (STMicroelectronics)
Presenter: - SHOUT-Trainer: Closed-loop Trainer for Silent Data Corruption Hunting and Observation Using Transformers – Seyedehmaryam GHASEMI, Shanmukha MANGADAHALLI SIDDARAMU, Mehdi TAHOORI (Karlsruhe Institute of Technology)
Presenter: - Thermal Laser Stimulation of Bulk Built-In Current Sensors in Silicon Devices – Hugo PERRIN (École des Mines de Saint-Étienne), Jean-baptiste RIGAUD (ENSM-SE), Raphael VIERA (EMSE)
Presenter: - VeriSide-II: Structure-Aware Power Modeling for Side-Channel Analysis at Register Transfer Level – Behnam FARNAGHINEJAD, Annachiara RUOSPO, Alessandro SAVINO, Stefano DI CARLO, ERNESTO SANCHEZ (Politecnico di Torino)
Presenter:
11:50 – 12:50 Special Session 3 – AI Accelerators Architectures Reliability: Measure, Mitigate, Co-Design
Organizer & Moderator: Dimitris GIZOPOULOS (University of Athens)
- Freddy GABBAY (Hebrew U of Jerusalem),
- Odysseas CHATZOPOULOS, Dimitris GIZOPOULOS, Maria TRAKOSA (University of Athens)
- Anton ROZEN (Nvidia)
12:50 – 14:00 Lunch Break
14:00 – 15:20 Regular Session 8 – Power and Energy Optimization
Moderator: TBD
- Functional Self-Test for Deep Neural Networks – Dina MOUSSA, Hefenbrock MICHAEL, Mehdi TAHOORI (Karlsruhe Institute of Technology)
Presenter: - Runtime BIST for ReRAM-based CAM using Frequency-Domain Monitoring – Haneen G. HEZAYYIN, Mehdi TAHOORI (Karlsruhe Institute of Technology)
Presenter: - From prompts to pressure: evaluating LLM-driven agents for GPU stress-code generation – Giuseppe ESPOSITO, Aurora GENSALE, Juan GUERRERO, Josie RODRIGUEZ CONDIA, Luca CAGLIERO, Matteo SONZA REORDA (Politecnico di Torino)
Presenter: - Optimizing Test Economics Trade-Offs in Homogeneous 3D SICs via Cost Modeling – Giusy IARIA, Paolo BERNARDI (Politecnico Di Torino), Claudia BERTANI, Giuseppe GAROZZO, Vincenzo TANCORRE (STMicroelectronics)
Presenter:
15:20 – 15:50 Coffee Break
15:50 – 16:50 Regular Session 9 – PUFs and Trustworthy Hardware
Moderator: TBD
- GINx4TL: Fine-grained Hardware Trojan Localization and Extraction Using Feature Explainable Graph Isomorphism Network – Afjal SAROWER (University of Arizona), Rozhin YASAEI (The University of Arizona)
Presenter: - TroPUF: Evaluating Hardware Trojan Insertion in Delay-Based Physical Unclonable Functions – Marissa MARCARELLI, Amin REZAEI (California State University, Long Beach)
Presenter: - Stochastic Model for a CMOS Image Sensor-Based PUF – Pierrick ARPIN (CEA-Léti), Florian PEBAY PEYROULA (CEA), Gilles SICARD, Yann PANEBOEUF, Antoine DUPRET (CEA-Léti)
Presenter: